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Cover of Parallel Implementation of an Algorithm for Delaunay Triangulation

Parallel Implementation of an Algorithm for Delaunay Triangulation

(Paperback)

National Aeronautics and Space Adm Nasa,

Independently Published (Publisher)

Published
2018
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0
Technology, Engineering, Agriculture, Industrial processesOther technologies and applied sciencesSpace science

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The theory and practice of implementing Tanemura's algorithm for 3D Delaunay triangulation on Intel's Gamma prototype, a 128 processor MIMD computer, is described. Efficient implementation of Tanemura's algorithm on a conventional, vector processing supercomputer is problematic. It does not vectorize to any significant degree and requires indirect addressing. Efficient implementation on a parallel architecture is possible, however. Speeds in excess of 20 times a single processor Cray Y-MP are realized on 128 processors of the Intel Gamma prototype. Merriam, Marshal L. Ames Research Center NASA-TM-103951, A-92144, NAS 1.15:103951 RTOP 505-59-53...

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